X. Wang, T. Liu, S. Gui, M. Thornton, and P. Gui, "A 2.56 Gbps Asynchronous Serial Transceiver with Embedded 80 Mbps Secondary Data Transmission Capability in 65nm CMOS”, Accepted for presentation at IEEE Radio-Frequency Integrated Circuits (RFIC), Philadelphia 2018.

T. Liu, X. Wang, R. Wang, G. Wu, T. Zhang and P. Gui, “A Temperature Compensated Triple-Path PLL with KVCO Non-Linearity Desensitization Capable of Operating at 77 K," accepted to IEEE Transactions on Circuits and Systems I: Regular Papers (TCAS-I).

G. Wu, D. Huang, J. Li, P. Gui, T. Liu, S. Guo, Y. Fan, M. Morgan, “A 1-16 Gb/s All-Digital Clock and Data Recovery with a Wideband, High-Linearity Phase Interpolator,” IEEE Transactions on Very Large-Scale Integration (VLSI) Systems, in press.

T. Zhang, P. Gui, S. Chakraborty, T. Liu, G. Wu, P. Moreira, F. Tavernier, “A 10 Gb/s Distributed-Amplifier-based VCSEL Driver IC in 130-nm CMOS,” submitted to IEEE Journal of Solid-State Circuits (JSSC).

S. Guo, T. Liu, T. Zhang, T. Xi, G. Wu, P. Gui, W. Maung, Y. Fan, and M. Morgan, “ A Low-Voltage Low-Power 25 Gb/s Clock and Data Recovery with Equalizer in 65 nm CMOS,” Proceedings of IEEE Radio-Frequency Integrated Circuits (RFIC) 2015.

S. Guo, T. Liu, T. Zhang, G. Wu,T. Xi, P. Gui, W. Maung, M. Morgan, “ A Low-Voltage Low-Power 28 Gb/s Serial-Link Receiver in 65 nm CMOS,” Proceedings of SRC TECHCON 2014.

S. Guo, T. Xi, G. Wu, T. Liu, T. Zhang, P. Gui, Y. Fan and M. Morgan, “A Low-Power 28 Gb/S CDR Using Artificial LC Transmission Line Technique in 65 nm CMOS,” proceedings of IEEE 57th International Midwest Symposium on Circuits and Systems (MWSCAS) 2014.