// half_adder.v  T. Manikas  2021 Dec 20
// test bench for half-adder circuit "half_adder.v"


module test_ha;
	reg a,b;
	wire s, co;
	half_adder ha(s,co,a,b);
	initial
	begin
		a=0; b=0;
		#2 a=0; b=1;
		#2 a=1; b=0;
		#2 a=1; b=1;
	end
	initial $monitor($time, " a=%b b=%b, sum=%b carry-out=%b",a,b,s,co);
	initial #10 $stop;
endmodule