Instructor: Dr. Manikas
Text: Parallel Computer Organization and Design, M. Dubois, M. Annavaram, and P. Stenstrom, Cambridge University Press, 2012.
Lecture: T,Th 11:00 am - 12:20 pm
Room: Caruth Hall, Room 161
Introduces the state of the art in uniprocessor computer architecture, with a focus on the quantitative analysis and cost-performance trade-offs in instruction set, pipeline, and memory design. Topics include quantitative analysis of performance and hardware costs, instruction set design, pipeline, delayed branch, memory organization, and advanced instruction-level parallelism.
C- or better in CSE 4381 or equivalent: machine organization, instruction set architecture design, memory design, control design, algorithms for computer arithmetic, microprocessors and pipelining. It is also expected that the student will have some programming background in a high-level language (C/C++ or Java), assembly language, and a hardware-description language such as Verilog.
Material Covered (tentative)
(Chapter and Topic)
NOTE: All updated course materials will be posted on Canvas.