Theodore W. Manikas
EXPERIENCE
Clinical
Professor, Department of Computer Science, Southern Methodist University,
2019 – present.
Clinical
Professor, Department of Computer Science and Engineering, Southern
Methodist University, 2015 – 2018.
Lecturer,
Department of Computer Science and Engineering, Southern Methodist University,
2012 – 2015.
Research
Associate Professor, Department of Computer Science and Engineering,
Southern Methodist University, 2010 - 2012.
Visiting Research
Professor, Department of Computer Science and Engineering, Southern
Methodist University, 2009 – 2010.
Co-Director, Institute of Nanotechnology, University of
Tulsa, 2007 - 2009.
Assistant
Professor, Department of Electrical
Engineering, University of Tulsa, 2000 - 2009.
Research interests
Computer engineering, genetic
algorithms, and computer-aided design methods.
Application areas include computer security, VLSI and nanotechnology
circuit design.
PROFESSIONAL CERTIFICATES
Licensed
Professional Engineer, Texas, Oklahoma
EDUCATION
Ph.D., Electrical
Engineering (with minors in Computer Science and Statistics), University of Pittsburgh
M.S.,
Electrical Engineering, Washington
University (St. Louis)
B.S.,
Electrical Engineering, Michigan State University
research grants
Current
1.
J. Dworak, T. Manikas, K. Nepal (U. St. Thomas),
"Harvesting Wasted Time and
Existing Circuitry for Efficient Field Testing ", National Science
Foundation CCF-1814928, 10/1/18 - 9/30/21, SMU amount $391,769, UST amount
$93,491
2.
T. Manikas, M. Thornton, “DOD Information
Assurance Scholarship Program”, Department of Defense H98230-18-1-0313, 8/1/18
- 7/31/19, $102,007
3.
F. Chang, M. Thornton, T. Manikas, “Research and
Investigation on Contractor Cyber Risk”, ISN, 9/1/18 – 8/31/19, $100,000
Completed
1. S.
Nair, T. Manikas, “DOD Information Assurance Scholarship Program”, Department
of Defense (DoD IASP H98230-16-1-0333), 9/13/16 - 9/12/17, $71,803.
2. S.
Nair, T. Manikas, “DOD Information Assurance Scholarship Program”, Department
of Defense (DoD IASP H98230-15-1-0327), 8/1/15 – 7/31/16, $60,126.
3. S.
Nair, T. Manikas, M. Thornton, “DOD Information Assurance Scholarship Program”,
Department of Defense (DoD IASP H98230-14-1-0296), 8/1/14 – 7/31/15, $61,936.
4. J.
Dworak, P. Gui, T. Manikas, “High-Bandwidth Built-in Self
Test for 3D ICs using Programmable Logic”, SMU Lyle School of
Engineering Seed Funding, 4/1/14 – 12/31/14, $15,810.
5. S.
Nair, T. Manikas, M. Thornton, “DOD Information Assurance Scholarship Program”,
Department of Defense (DoD IASP H98230-13-1-0425), 9/6/13 – 9/5/14, $66,813.
6. S.
Nair, M. Thornton, T. Manikas, “DOD Information Assurance Scholarship Program”,
Department of Defense (DoD IASP H98230-11-1-0446), 9/26/11 – 12/25/12, $54,871.
7. M.
Thornton, T. Manikas, “Radiation Hardened Standard Cell Library Design and
Benchmarking Research”, Silicon Space Technology.
8. S.
Nair, M. Thornton, T. Manikas, “Capacity Building for Security Architecture and
Infrastructure for Smart-Grids”, Department of Defense (DoD IASP H98230-09-1-0396),
9/10/10 – 2/9/12, $69,632.
9. “Investigative
Methods of Establishing Hardware Trust Centers with a Focus on Detection of
Trojans at the Register Transfer Level (RTL) During the Device Design Stage”, Lockheed-Martin
Aerospace, Fort Worth, Texas, June 30, 2011 - May 31, 2012.
10. “Secure
Smart Meter Firmware Research and Development”, PayGo
Electric, Alpharetta, Georgia, September 2010 - May 2011.
11. “Smart
Meter & DPA Resistant Encryption Research”, Revere Security, Dallas, Texas,
October 2010-August 2011.
- Visiting research position funded by the Office of
Naval Research (ONR Project N000140910784).
- K. Ashenayi, T. Manikas, P.
LoPresti, "A Proposal to Develop an
Advanced Down-hole Communication System", Champlin
Foundation, 1/1/07 – 5/31/09, $30,000.
- D. Teeters, T. Manikas, "Institute of
Nanotechnology", University of Tulsa, 5/15/07 - 5/14/09, $25,000.
- P. LoPresti, T. Manikas, J.
Kohlbeck, "Summer Electrical Engineering
Academy at The University of Tulsa for Precollege Students", OSRHE
(Oklahoma State Regents for Higher Education), 2007 - 2009, $31,500.
- T. Manikas, “Hybrid Circuit Design for Oil and Gas
Well Gauges”, OCAST (Oklahoma Center for the Advancement of Science and
Technology) project number AP071-i14, 3/1/07 - 2/29/08, $37,142 (50% from
OCAST, 50% from Geophysical Research Co, LLC).
- K. Ashenayi, T. Manikas,
"Specialized Electronic Wheelchair for a Cerebral Palsy
Patient", Assistive Technology Development Program of the American
Society for Engineering Education (ASEE) and National Institute for the
Severely Handicapped (NISH), 2008, $250.
- T. Manikas, “Floorplanning
to Optimize Chip Area and Signal Delay in VLSI Circuits”, Faculty Development Summer
Fellowship, University
of Tulsa, Summer
2005, $8212.
- T. Manikas, “Improving
Floorplan Design Models for VLSI Circuit Design”, Faculty Development Summer Fellowship, University of
Tulsa, Summer 2004, $7944.
- T. Manikas, “Using Preliminary Circuit Information to
Guide Pre-Placement Partitioning for VLSI Circuit Design”, Faculty
Development Summer Fellowship, University of Tulsa, Summer 2003, $7792.
- T. Manikas, “Effects of Pre-Placement Partitioning
Decisions on Placement Performance for VLSI Design”, Faculty Development
Summer Fellowship, University
of Tulsa, Summer
2002, $7678.
Industrial collaborations
- Silicon
Space Technologies, Austin, TX
- Thompson
& Knight LLP, Dallas, TX
- Raytheon,
Garland, TX
- Revere
Security, Addison, TX
- PayGo Electric, Alpharetta, GA
- Geophysical
Research Co., LLC, Tulsa,
OK
- ABB
Automation, Bartlesville,
OK
- WesDyne Corp., Pittsburgh,
PA
ORGANIZATIONS
- American
Society for Engineering Education (ASEE)
- Association
for Computing Machinery (ACM)
- Senior
Member, Institute of Electrical and Electronics Engineers (IEEE)
- National
Society of Professional Engineers (NSPE)
- Society
of Hispanic Professional Engineers (SHPE)
Honors and AWARDS
- Jake Karrfalt Best
Student Paper Award for “Scan Segment Disable for Capture Power
Reduction for Low-Power Decompressed Patterns”, presented at the 2019 IEEE North Atlantic Test Workshop,
May 2019
- IEEE
Excellence in Design and Test Engineering Award for the paper “Using
Existing Reconfigurable Logic in 3D Die Stacks for Test”, presented at the
25th IEEE North Atlantic Test Workshop, May 2016.
- Best
paper award for "An Axiomatic Analysis Approach for Large-Scale
Disaster-Tolerant Systems Modeling ", presented at the 2010 IIIS
International Multi-Conference on Complexity, Informatics, and
Cybernetics.
- Best
paper award for "A Senior Design Course That Simulates an Industrial
Engineering Environment", presented at the 2001 ASEE Midwest Section
Conference.
teaching
Southern Methodist University
Undergraduate
CSE 2353 Discrete
Computational Structures
CSE 4381 Digital
Computer Design
Undergraduate/Graduate
CSE 5380/7380 VLSI
Algorithms
CSE 5381/7381 Computer
Architecture
Graduate
CSE 7390 Special
Topics: Applications of Random Number Generation (independent study)
The University of Tulsa
Undergraduate
EE 2161 Digital
Design Laboratory
EE 2163 Digital
Design Principles
EE 3113 Signals
and Linear Systems
EE 4073 Information
and Communications Systems
Undergraduate/Graduate
EE 4143/6443 VLSI
Design
Graduate
EE 7063 Computer
Engineering
EE 7993 VLSI
Design Automation (independent study)
EE 7993 VLSI
Logic Synthesis (independent study)
EE 7993 VLSI
Physical Synthesis (independent study)
service
Professional
- Subject
Matter Expert (SME) for NCEES (National Council of Examiners for
Engineering and Surveying) – on Electrical/Computer Exam committee, 2004 -
present
- Session
Chair, ASEE/IEEE Frontiers in Education Conference, 2013
- Session
Judge, 81st AAAS-SWARM Annual Meeting, 2006
- Student
Activities Chair, Tulsa
IEEE, 2004 – 2006
- Session
Moderator, 2005 ASEE Midwest Section
Conference
Southern Methodist University
·
Computer Science Faculty Search Committee, 2019
- present
·
Undergraduate Adviser, Computer Science, 2019 -
present
·
Chair, Computer Science Graduate Program
Committee, 2019 - present
·
Chair, Computer Science Undergraduate Program
Committee, 2019– present
·
Chair, Computer Science TA Selection Committee,
2019 – present
·
Computer Science and Engineering Faculty Search
Committee, 2017 - 2018
·
Undergraduate Adviser, Computer Engineering and
Computer Science Security Track, 2014 - 2018
·
Chair, Computer Science and Engineering Graduate
Program Committee, 2010 - 2018
·
Chair, Computer Science and Engineering Undergraduate
Program Committee, 2012 – 2018
·
Chair, Computer Science and Engineering TA
Selection Committee, 2012 – 2018
·
Computer Engineering Graduate Admissions
Coordinator, 2012 - 2018
·
Lyle College of Engineering Assessment
Committee, 2011 – 2018
·
Hunt Leadership Scholarship Application Review
Panel, 2017
·
Digital Repository Advisory Board, 2012 - 2014
·
University representative for the Synopsys
Curricula Advisory Board, 2010 – 2015
·
Computer Science and Engineering Industry
Advisory Board Liaison, Curriculum and Technology, 2011 – 2012
·
Session Judge, Graduate Research Colloquium,
2011, 2013
The University of Tulsa
- Faculty
Advisor for Eta Kappa Nu - Zeta Nu Chapter, 2002
- 2009
- Session
Judge, 11th Annual Student Research Colloquium, 2008
- ABET
committee member, College
of Engineering and
Natural Sciences, 2005 - 2006
- Alternate
on Faculty Senate, 2001 - 2002, 2003 - 2004
Reviewed for
- Arabian
Journal for Science and Engineering
- Artificial
Neural Networks in Engineering Conference
- ASEE
Annual Conference: College-Industry Partnership Division
- ASEE Midwest Section Conference
- BioSystems
- CCSC
(Consortium for Computing Sciences in Colleges) – South Central Region
Conference
- Energies
- Expert
Systems Journal
- IEEE
Frontiers in Education Conference
- IEEE
International Symposium on Multiple-Valued Logic
- IEEE
Journal on Emerging and Selected Topics in Circuits and Systems
- IEEE
Recent Advances in Intelligent Computational Systems Conference
- IEEE
Robotics and Automation Letters
- IEEE
Transactions on Automation Science and Engineering
- IEEE
Transactions on Circuits and Systems
- IEEE
Transactions on Evolutionary Computation
- IEEE
Transactions on Robotics
- IEEE
Transactions on Very Large Scale Integration Systems
- International
Conference on Computing, Communications and Control Technologies
·
International Conference on Design and Modeling
in Science, Education, and Technology
- International
Conference on Robotics and Automation
- International
Journal of Advanced Robotic Systems
- International
Journal of Computing Science and Mathematics
- International
Journal of Critical Infrastructure Protection
- International
Journal of Economics and Management Engineering
- International
Journal of General Systems – Intelligent Systems Design
- International
Journal of Parallel and Distributed Systems and Networks
- International
Journal of Robotics and Automation
- International
Journal of Vehicle Autonomous Systems
- Journal
of Combinatorial Optimization
- Journal
of Multiple-Valued Logic and Soft Computing
- McGraw-Hill
Publishers
- PennWell Publishing
- Sensors
- Soft
Computing Journal
- World
Congress on Nature and Biologically Inspired Computing
thesis and dissertation committees
Southern Methodist University
Masters Chair
(Computer Science and Engineering)
1.
Micah Thornton, M.S., Computer Engineering,
2017, “Randomness Properties of Cryptographic Hash Functions”
Masters Committees
Computer Science: Gerald Shaffer, Xiaodian
Xie, Samuel Hunter
Computer Engineering:,
David Houngninou, Adam Zygmontowicz, Phillip Morris,
Yi Sun, Sravana Kancharla, Michael Taylor
Electrical Engineering: Nisharg Shah, Chi Zhang,
Lakshmi Ramakrishnan, Tao Fu
Doctoral Committees
1.
Eman Ababtain, Ph.D., Computer Science
2.
Qutaiba Khasawneh, Ph.D., Electrical Engineering
3.
Kaitlin Smith, Ph.D., Electrical Engineering
4.
Sherry Huang, Ph.D., Electrical Engineering,
2019
5.
Rita Enami, Ph.D., Electrical Engineering, 2019
6.
Stephen Hanka, D.E.,
Software Engineering, 2019
7.
Abdullah Bokhary, Ph.D., Computer Science, 2018
8.
Kexu Sun, Ph.D., Electrical Engineering, 2018
9.
Guanhua Wang, Ph.D., Electrical Engineering,
2018
10. Fanchen
Zhang, Ph.D., Computer Engineering, 2018
11. David
Houngninou, Ph.D., Computer Engineering, 2017
12. Soha
Alhelaly, Ph.D., Computer Science, 2017
13. Adel
Alharbi, Ph.D., Computer Engineering, 2017
14. Isaac
Chow, D.E., Software Engineering, 2017
15. Mihai
Tudor Panu, Ph.D., Computer Science, 2014
16. John
J. Howard, Ph.D., Electrical Engineering, 2014
17. Anurag
Nagar, Ph.D., Computer Science, 2013
18. Siling Wang, Ph.D., Computer Science, 2011
19. Lun Li, Ph.D., Computer Engineering, 2006
The University of Tulsa
Masters Chair
(Electrical Engineering)
- Joshua Buck, M.S. 2008, “Acoustic Downhole Telemetry”
(co-chair)
- Christopher Carpenter, M.S. 2008, “Specialized
Electronic Wheelchair for a Cerebral Palsy Patient” (co-chair). Second place award, Tulsa Student
Research Colloquium
- Debarshi Chatterjee, M.S.,
2007, "Overcoming the Thermal Challenge in Deep Submicron Technology
through Fast Thermal Floorplanning and Post Floorplanning Whitespace
Reallocation". Honorable mention, Tulsa Student
Research Colloquium
- Andrew Hand, M.S., 2007, “A Tool for Benchmarking
Robot Path Planning" (co-chair)
- Christopher Linnet, M.S., 2006, "A Comparison of
Genetic Algorithm Operator Methods in Binary Decision Diagram Variable
Ordering"
- Kamran H-Sedighi, M.S.,
2003, “Local Path Planning of an Autonomous Mobile Robot Using a Genetic
Algorithm” (co-chair)
- Aditia Hermanu,
M.S., 2002, "Genetic Algorithm with Modified Novel Value Encoding
Technique for Autonomous Robot Navigation"
- Lun Li, M.S., 2002,
"Channel Height Estimation in VLSI Design Automation"
- Thomas Geisler, M.S., 2002, "Autonomous Robot
Navigation System Using a Genetic Algorithm with a Novel Value Encoding
Technique". First place award, Tulsa Student
Research Colloquium
Masters Committees
Electrical
Engineering: Yan Yu, Dong Xiang, Men Long, Su Yang, Sidharth Thakur, Gautam
Ramamurthy, Jagruthi Godugu,
Like Zhang, Alagappan S. Alagappan,
Jovonia Taylor, Tuan Huynh
Computer Science:
Samuel East, Arun Seelagan,
Aaron Engel, Michael Spainhower, Denise Grayson, Christopher
McVay, Donald Jung
Doctoral Committees (Ph.D.)
- Pravin
Utekar, Chemical Engineering, 2008
- William
Hamill, Computer Science, 2008
- Marcos
Melendez-Rodriguez, Computer Science, 2007
- Ryan
Sheahan (Shayto),
Computer Science, 2007
- Jesus
Gonzalez-Pino, Computer Science, 2006
- Janica Edmonds, Computer Science, 2006
Presentations and technical reports
Professional Presentations
1. “System
Threats with Conditional Probabilities: Analysis using Multiple-Valued Logic
Decision Diagrams”, Graduate Seminar, Southern Methodist University, October 3,
2012.
2. “A
Pareto-Optimal Genetic Algorithm for Channel Routing in Integrated Circuits”,
Graduate Seminar, Southern Methodist University, February 1, 2012.
3. “Using
Multiple-Valued Logic Decision Diagrams to Analyze System Threats”, Graduate
Seminar, Southern Methodist University, October 12, 2011.
4. “Genetic
Algorithms and their Applications to Engineering Problems”, Graduate Seminar,
Southern Methodist University, March 31, 2011.
5. “Genetic
Algorithms and their Applications to Engineering Problems”, Graduate Seminar,
Computer Science, University of Texas at Dallas, December 15, 2010.
6. “Axiomatic
Analysis and Cyber Threat Tree Models for the Development of Large-Scale
Disaster-Tolerant Systems”, IEEE Computer Society Meeting, Texas Instruments,
Dallas, Texas, June 18, 2010.
7. “VLSI
and Nanotechnology Circuit Design for Mixed-Signal Sensor Systems”, Graduate
Seminar, Southern Methodist University, October 1, 2009.
- "Path Planning for Autonomous Navigation Using
Genetic Algorithms", Graduate Seminar, Advanced Technology Research Center, Oklahoma
State University - Tulsa,
April 28, 2008.
- “Career
Options in Today’s Market”, Panel Discussion, IEEE Region 5 Student Professional
Activities Conference, Norman,
OK, April 3, 2004.
- “Autonomous Robot Navigation for Hazardous
Environments”, Graduate Seminar, Advanced Technology Research Center, Oklahoma
State University, March
12, 2004.
Technical Reports
- T.W. Manikas and J.T. Cain, “Genetic Algorithms vs.
Simulated Annealing: A Comparison of Approaches for Solving the Circuit
Partitioning Problem”, EE-TR-96-101, Department of Electrical Engineering,
University
of Pittsburgh, May
1996.
- T.W. Manikas, “Getting Started with the UT-SIM
Ultrasonic Modeling Program (Version 0.04)”, WesDyne
Corp., December 1995.
PUBLICATIONS
Journal Articles
- K. Nepal, S. Alhelaly, J. Dworak, R.I. Bahar, T.
Manikas, and P. Gui, “Repairing a 3D Die-Stack Using Available
Programmable Logic”, IEEE Trans. Computer-Aided
Design of Integrated Circuits v. 34, n. 5, pp. 849-861, May 2015.
- T.W. Manikas, M.A. Thornton, D.Y. Feinstein, “Modeling
System Threat Probabilities Using Mixed-Radix Multiple-Valued Logic
Decision Diagrams”, Journal of Multiple-valued
Logic and Soft Computing, v. 24.1-4, pp. 135-149, 2015, (invited paper).
3. S.
Nagayama, T. Sasao, J. Butler, M. Thornton and T.
Manikas, “On Optimizations of Edge-Valued MDDs for Fast Analysis of Multi-State
Systems”, IEICE Transactions on Information
and Systems, Vol.E97-D, No.9, pp.2234-2242, Sep. 2014.
4. T.W.
Manikas, “Integrated Circuit Channel Routing Using a Pareto-Optimal Genetic
Algorithm”, Journal of Circuits, Systems,
and Computers, vol. 21, no. 5, Aug. 2012.
5. T.W.
Manikas, L.L. Spenner, P.D. Krier, M.A. Thornton, S.
Nair, and S.A. Szygenda, “An Axiomatic Analysis Approach for Large-Scale
Disaster-Tolerant Systems Modeling”, Journal of Systemics,
Cybernetics and Informatics, vol. 9, no. 1, 2011, pp. 89-93.
6. D.
Chatterjee and T.W. Manikas, "On-Chip Thermal Optimisation
by Whitespace Reallocation using a Constrained Particle-Swarm Optimisation Algorithm", IET Circuits, Devices, and
Systems, vol. 4, no. 3, May 2010,
pp. 251-260.
- P. LoPresti, T.W. Manikas,
and J. Kohlbeck, "An Electrical Engineering
Summer Academy for Middle School and High School Students", IEEE Transactions on Education,
vol. 53, no. 1, Feb. 2010, pp. 18-25.
- K. H-Sedighi, K. Ashenayi, T.W. Manikas, and R.L. Wainwright, "A
Genetic Algorithm for Autonomous Navigation Using Variable-Monotone
Paths", Int. Journal of
Robotics and Automation, vol. 24, no. 4, 2009, pp. 367-373.
- T.W. Manikas, K. Ashenayi,
and R.L. Wainwright, "Genetic Algorithms for Autonomous Robot
Navigation", IEEE Instrumentation & Measurement Magazine,
vol. 10, no. 6, Dec. 2007, pp. 26-31 (invited
paper).
Book Contributions
- A. Hand, J. Godugu, K. Ashenayi, T.W. Manikas, and R.L. Wainwright, “Benchmarking
of Robot Path Planning Algorithms”, in Intelligent Engineering Systems
Through Artificial Neural Networks: Smart Engineering Systems Design:
Neural Networks, Fuzzy Logic, Evolutionary Programming, Complex Systems
and Artificial Life, C.H. Dagli, et al.,
Editors. Vol. 15, 2005, ASME Press: New York, pp. 377-383.
- A. Hermanu, T.W. Manikas,
K. Ashenayi, and R.L. Wainwright, “Autonomous Robot Navigation Using a
Genetic Algorithm with an Efficient Genotype Structure”, in Intelligent
Engineering Systems Through Artificial Neural Networks: Smart Engineering
Systems Design: Neural Networks, Fuzzy Logic, Evolutionary Programming,
Complex Systems and Artificial Life, C.H. Dagli,
et al., Editors. Vol. 14, 2004, ASME Press: New York, pp. 319-324.
National/International Conferences
1. T.W.
Manikas and M.A. Thornton, “Model Checking for Security Analysis of
Cyber-Physical Systems”, 2nd
International Conference on Data Intelligence and Security (ICDIS 2019),
South Padre Island, TX, USA, June 2019
2.
K. N. Smith, M. A. Taylor, A. A.
Carroll, T. W. Manikas and M. A. Thornton, "Automated Markov-chain based
analysis for large state spaces," 2017 Annual IEEE International Systems
Conference (SysCon), Montreal, QC,
Canada, 2017, pp. 1-8.
3. P.C.
Davis, M.A. Thornton, T.W. Manikas, “Reliability Block Diagram Extensions for
Non-Parametric Probabilistic Analysis”, Proc.
10th Annual IEEE Systems Conference (SysCon),
April 2016, pp. 927-932.
4.
T.W. Manikas, M.A. Thornton, S. Nagayama, “An
Improved Methodology for System Threat Analysis Using Multiple-Valued Logic and
Conditional Probabilities”, Society for
Design and Process Science Conf. (SDPS
2015), Nov. 2015.
5.
S. Nagayama, T. Sasao,
J. Butler, M. Thornton, and T. Manikas, “Edge Reduction for EVMDDs to Speed Up
Analysis of Multi-State Systems”, Proc.
45th IEEE International Symposium
on Multiple-Valued Logic, May 2015, pp. 170-175.
6. M.
Thornton, T. Manikas, S. Szygenda and S. Nagayama, "System Probability
Distribution Modeling using MDDs", 44th
IEEE International Symposium on Multiple-Valued Logic, May 2014, pp.
196-201.
7. S.
Nagayama, T. Sasao, J. Butler, M. Thornton and T.
Manikas, "Analysis Methods of Multi-State Systems Partially Having
Dependent Components Using Multiple-Valued Decision Diagrams", 44th IEEE International Symposium on
Multiple-Valued Logic, May 2014, pp. 190-195.
8. K.
Nepal, X. Shen, J. Dworak, T. Manikas, R.I. Bahar, “Built-in Self-Repair in a
3D Die Stack Using Programmable Logic”, 16th
IEEE Symp. Defect and Fault Tolerance in VLSI and
Nanotechnology Systems, Oct. 2013, pp. 243-248.
- M.A. Thornton, T.W. Manikas, and P.A. Laplante, "Embedded and Real-time Systems Classes
in Traditional and Distance Education Format", Proc. 43rd IEEE Annual Frontiers in Education Conf.
(FIE 2013), Oct. 23-26, 2013, Oklahoma City, Oklahoma, USA, pp. 1379-1385.
- M.A. Thornton and T.W. Manikas, "Spectral
Response of Ternary Logic Netlists", Proc. 43rd IEEE International Symposium on Multiple-Valued
Logic (ISMVL 2013), May 21-24, 2013, Toyama, Japan, pp. 109-116.
- T.W. Manikas, D.Y. Feinstein, M.A. Thornton, “Modeling
Medical System Threats with Conditional Probabilities Using
Multiple-Valued Logic Decision Diagrams”, Proc. 42nd IEEE International Symposium on
Multiple-Valued Logic (ISMVL 2012), May 14-16, 2012, Victoria, British
Columbia, Canada, pp. 244-249.
- T.W. Manikas, M.A. Thornton, D.Y. Feinstein, “Using
Multiple-Valued Logic Decision Diagrams to Model System Threat
Probabilities”, Proc. 41st
IEEE International Symposium on
Multiple-Valued Logic (ISMVL-11), May 23-25, 2011, Tuusula, Finland, pp. 263-267.
- T.W. Manikas, “Modeling of Large-Scale
Disaster-Tolerant Systems”, Society
for Design and Process Science Conf.
(SDPS 2010), June 6-11, 2010, Dallas, Texas, USA.
14. T.W.
Manikas, L.L. Spenner, P.D. Krier, M.A. Thornton, S.
Nair, and S.A. Szygenda, “An Axiomatic Analysis Approach for Large-Scale
Disaster-Tolerant Systems Modeling”, Proc. Int. Multi-Conf
on Complexity, Informatics, and Cybernetics (IMCIC’10), Int. Institute of
Informatics and Systemics (IIIS), April 6-10, 2010,
Orlando, Florida, USA, pp. 66 – 70, (best paper award).
- P. Ongsakorn, K. Turney, M.
Thornton, S. Nair, S. Szygenda, and T. Manikas, “Cyber Threat Trees for
Large System Threat Cataloging and Analysis”, Proc. IEEE Int. Systems Conference, April 5-8, 2010, San
Diego, California, USA, pp. 610-615.
- L. Spenner, P. Krier, M.
Thornton, S. Nair, S. Szygenda, and T. Manikas, “Large System
Decomposition and Simulation Methodology Using Axiomatic Analysis”, Proc. IEEE Int. Systems Conference,
April 5-8, 2010, San Diego, California, USA, pp. 223-227.
- D. Chatterjee, T.W. Manikas, I. Markov, "COOLER-
A Fast Multiobjective Fixed-outline Thermal Floorplanner", Proc. 3rd Annual Austin Conf.
on Integrated Systems & Circuits (ACISC-08), 2008.
- P.C. Utekar, T.W. Manikas,
and D. Teeters, "Nanobattery-crossbar
system, a promising candidate for future nanoscale data storage", Proc. 213th ECS (ElectroChemical Society)
Meeting, 2008.
- T.W. Manikas and D. Teeters, "Multiple-Valued
Logic Memory System Design Using Nanoscale Electrochemical Cells",
Proc 38th IEEE International Symposium on Multiple-Valued Logic (ISMVL-08),
2008, pp. 197-201.
- D. Chatterjee and T.W. Manikas, "A Genetic
Algorithm for Non-Slicing Floorplan Representation", Proc. Nat.
Conf. on Intelligent Systems (NCIS), 2007.
- T.W. Manikas and D. Teeters, "Nanoscale Power
and Memory Unit Design for Nanoscale Sensor Systems", Proc. 53rd
ISA Int. Instrumentation Symp., 2007.
- D. Chatterjee and T.W. Manikas, "Power-Density
Aware Floorplanning for Reducing Maximum On-Chip Temperature", Proc.
18th IASTED Int. Conf. on Modelling and Simulation, 2007.
- D. Ashlock, T.W. Manikas,
and K. Ashenayi, “Evolving A Diverse Collection
of Robot Path Planning Problems”, Proc. 2006 IEEE Congress on
Evolutionary Computation, 2006.
- K. H-Sedighi, K. Ashenayi, T.W. Manikas, R.L. Wainwright, H.M. Tai, "Autonomous
Local Path Planning for a Mobile Robot Using a Genetic Algorithm", Proc.
2004 IEEE Congress on Evolutionary Computation, 2004.
- T.W. Manikas and M.H. Mickle, "A Genetic
Algorithm for Mixed Macro and Standard Cell Placement", Proceedings of the 45th IEEE International Midwest Symposium on Circuits and Systems, 2002.
- T. Geisler and T.W. Manikas, "Autonomous Robot
Navigation System Using a Novel Value Encoded Genetic Algorithm", Proceedings of the 45th IEEE
International Midwest Symposium on
Circuits and Systems, 2002.
- L. Li, T.W. Manikas, and H. Jin,
"Channel Height Estimation in VLSI Design", Proceedings of the 45th IEEE International Midwest Symposium on Circuits and Systems, 2002.
National/International Workshops
1. Y.
Sun, H. Jiang, L. Ramakrishnan, M. Segal, J. Dworak, K. Nepal, T. Manikas, and
R. I. Bahar, “Scan Segment Disable for Capture Power Reduction for Low-Power
Decompressed Patterns”, 2019 IEEE North Atlantic Test Workshop (NATW),
Essex, VT, USA, May 2019 (Jake Karrfalt Best Student Paper Award)
3.
S. Alhelaly, J. Dworak, T. Manikas, P.
Gui, K. Nepal and A. L. Crouch, "Detecting a Trojan die in 3D stacked
integrated circuits," 2017 IEEE North Atlantic Test Workshop
(NATW), Providence, RI, USA, May 2017, pp. 1-6.
4. F.
Zhang, Y. Sun, X. Shen, K. Nepal, J. Dworak, T. Manikas, P. Gui, R.I. Bahar, A.
Crouch, and J. Potter, “Using Existing Reconfigurable Logic in 3D Die Stacks
for Test”, 25th IEEE North Atlantic Test
Workshop, May 2016, (IEEE Excellence
in Design and Test Engineering Award).
5. K.
Nepal, X. Shen, J. Dworak, T. Manikas, R.I. Bahar, "Harnessing an FPGA for
Built-in Self-Repair in a 3D Die Stack", 22nd IEEE North Atlantic Test Workshop, May 2013.
- T.W. Manikas, M.A. Thornton, and F.R. Chang,
"Mission Planning Analysis using Decision Diagrams", 2013 Reed Muller Workshop, May
2013.
- S. Pham, J.L. Dworak, and T.W. Manikas, “An Analysis
of Differences between Trojans inserted at RTL and at Manufacturing with
Implications for their Detectability”, 2012
IEEE North Atlantic Test Workshop, May 2012.
- T.W. Manikas and G.R. Kane, "Partitioning Effects
on Estimated Wire Length for Mixed Macro and Standard Cell
Placement", Proceedings of the
11th IEEE/ACM International Workshop on Logic and Synthesis,
2002.
- T.W. Manikas and G.R. Kane, "Standard Cell
Partition Size Variance and its Effect on Physical Design", Proceedings of the 10th IEEE
International Workshop on Logic and Synthesis, 2001.
Regional Conferences
- T.W. Manikas and M.A. Thornton, “Axiomatic Analysis
and Cyber Threat Tree Models for the Development of Large-Scale
Disaster-Tolerant Information Security Systems”, 2010 Symposium on Information Systems and Computing Technology
Network (ISaCTN), April 2010.
- M. Samiee, K. Ashenayi, and T. Manikas, "Investigation of
Characteristics of Production Pipe as Related to Data Communication in an
Oil Well", Proceedings of the
2009 AAAS-SWARM Annual Meeting, 2009.
- B. Gahring, T. Manikas, and
K. Ashenayi, "Developing an Autonomous
Robot Navigation System Using Genetic Algorithms", Proceedings of the 2009 AAAS-SWARM
Annual Meeting, 2009.
- T.W. Manikas and K. Ashenayi,
"Industry-University Partnerships for Undergraduate Engineering
Internships", Proceedings of the 2008 ASEE Midwest
Section Conference, 2008.
- P. G. LoPresti, T.W.
Manikas, J. Kohlbeck, "An Electrical
Engineering Summer Academy for Middle School and High School
Students", Proceedings of the 2008 ASEE Midwest Section Conference,
2008.
- T.W. Manikas and G.R. Kane, "Developing and
Funding Undergraduate Engineering Internships", Proceedings of the
2007 ASEE Midwest Section Conference,
2007.
- C.M. Linnet and T.W. Manikas, “A Genetic Algorithm
for Binary Decision Diagram Variable Ordering”, Proceedings of the 81st
AAAS-SWARM Annual Meeting, 2006.
- T.W. Manikas, D.E. Jussaume,
and G.R. Kane, “Developing Laboratory Courses in a Resource-Constrained
Environment”, Proceedings of the 2005 ASEE Midwest
Section Conference, 2005.
- T.W. Manikas and G.R. Kane, “Developing Graduate
Research Skills using Guided Reading Assignments”, Proceedings of the
39th ASEE Midwest Section Conference, 2004.
- T.W. Manikas and G.R. Kane, “A VLSI Design Course in
a Resource-Constrained Environment”, Proceedings of the 38th ASEE Midwest Section Conference, 2003.
- T.W. Manikas and G.R. Kane, “Partitioning Effects on
Placement Performance for VLSI Design”, Proceedings of the 78th AAAS-SWARM
Annual Meeting, 2003.
- T. W. Manikas, G. R. Kane, and J. G. Kohlbeck, "A Digital Logic Design Laboratory for
Electrical Engineering and Computer Science Undergraduates", Proceedings of the 37th ASEE Midwest
Section Conference, 2002.
- M.O. Durham
and T.W. Manikas, "A Senior Design Course That Simulates an
Industrial Engineering Environment", Proceedings of the 36th ASEE Midwest Section Conference, 2001 (best
paper award).
(7/29/19)