# This file has been generated using RevKit 1.1 (www.revkit.org)
# Command Line:
# ./tools/bdd_synthesis.py --filename mini-alu_84.pla --realname mini-alu_84.real
# Based on the approach proposed in R. Wille and R. Drechsler. BDD-based synthesis of reversible logic for large functions. In Design Automation Conf., pages 270-275, 2009.
.version 2.0
.numvars 10
.variables x0 x1 x2 x3 x4 x5 x6 x7 x8 x9
.inputs a b c d 0 0 1 1 1 0
.outputs  g g g g g g c g g d
.constants ----001110
.garbage 111111-11-
.begin
t3 x1 x2 x4
t3 x3 x4 x5
t3 x1 x2 x6
t2 x2 x6
t1 x6
t3 x0 x6 x5
t3 x0 x5 x6
t2 x1 x7
t2 x2 x7
t2 x3 x8
t2 x4 x8
t3 x3 x7 x8
t3 x3 x4 x8
t2 x3 x9
t3 x3 x4 x9
t2 x4 x9
t1 x9
t3 x0 x9 x8
t3 x0 x8 x9
t1 x9
.end