# This file has been generated using RevKit 1.1 (www.revkit.org)
# Command Line:
# ./tools/bdd_synthesis.py --filename mod5adder_66.pla --realname mod5adder_66.real
# Based on the approach proposed in R. Wille and R. Drechsler. BDD-based synthesis of reversible logic for large functions. In Design Automation Conf., pages 270-275, 2009.
.version 2.0
.numvars 32
.variables x0 x1 x2 x3 x4 x5 x6 x7 x8 x9 x10 x11 x12 x13 x14 x15 x16 x17 x18 x19 x20 x21 x22 x23 x24 x25 x26 x27 x28 x29 x30 x31
.inputs a b c d e f 1 1 0 0 1 0 0 0 0 1 0 0 1 1 1 0 0 0 1 1 1 0 1 1 1 1
.outputs  a b c g g g g g g g g g g g d g g g g g g g g e g g g g g g g f
.constants ------11001000010011100011101111
.garbage ---11111111111-11111111-1111111-
.begin
t2 x1 x6
t2 x4 x6
t3 x3 x6 x7
t2 x6 x7
t2 x3 x8
t3 x2 x7 x8
t3 x2 x3 x8
t3 x3 x4 x9
t3 x1 x4 x10
t2 x1 x10
t2 x10 x11
t3 x0 x4 x11
t3 x0 x10 x11
t3 x1 x4 x12
t2 x12 x13
t3 x0 x6 x13
t3 x0 x12 x13
t2 x13 x14
t3 x3 x11 x14
t3 x3 x13 x14
t2 x14 x9
t3 x2 x9 x14
t2 x14 x8
t3 x5 x8 x14
t2 x0 x15
t2 x4 x15
t2 x1 x16
t3 x1 x4 x16
t2 x4 x16
t2 x0 x17
t3 x0 x16 x17
t2 x16 x17
t2 x3 x18
t2 x17 x18
t3 x3 x15 x18
t3 x3 x17 x18
t2 x0 x19
t2 x6 x19
t3 x0 x16 x19
t3 x0 x6 x19
t1 x19
t3 x3 x19 x15
t3 x3 x15 x19
t1 x19
t3 x2 x19 x18
t3 x2 x18 x19
t2 x0 x20
t2 x6 x20
t3 x0 x10 x20
t3 x0 x6 x20
t2 x20 x21
t3 x3 x16 x21
t3 x3 x20 x21
t2 x4 x22
t3 x0 x10 x22
t3 x0 x4 x22
t2 x0 x23
t3 x0 x6 x23
t2 x6 x23
t1 x23
t3 x3 x23 x22
t3 x3 x22 x23
t2 x23 x21
t3 x2 x21 x23
t2 x23 x19
t3 x5 x19 x23
t2 x0 x24
t2 x12 x24
t3 x0 x16 x24
t3 x0 x12 x24
t3 x3 x24 x25
t2 x24 x25
t2 x0 x26
t2 x12 x26
t2 x3 x27
t3 x3 x26 x27
t2 x26 x27
t2 x27 x25
t3 x2 x25 x27
t3 x1 x4 x28
t2 x4 x28
t2 x0 x29
t2 x12 x29
t3 x0 x28 x29
t3 x0 x12 x29
t3 x3 x29 x30
t2 x29 x30
t3 x0 x28 x31
t2 x0 x31
t2 x31 x11
t3 x3 x11 x31
t2 x31 x30
t3 x2 x30 x31
t1 x31
t3 x5 x31 x27
t3 x5 x27 x31
.end