# This file has been generated using RevKit 1.1 (www.revkit.org)
# Command Line:
# ./tools/bdd_synthesis.py --filename rd84_70.pla --realname rd84_70.real
# Based on the approach proposed in R. Wille and R. Drechsler. BDD-based synthesis of reversible logic for large functions. In Design Automation Conf., pages 270-275, 2009.
.version 2.0
.numvars 34
.variables x0 x1 x2 x3 x4 x5 x6 x7 x8 x9 x10 x11 x12 x13 x14 x15 x16 x17 x18 x19 x20 x21 x22 x23 x24 x25 x26 x27 x28 x29 x30 x31 x32 x33
.inputs x1 x2 x3 x4 x5 x6 x7 x8 1 0 0 1 0 1 0 1 1 1 0 0 0 0 1 0 0 1 0 0 1 0 0 0 0 0
.outputs  g g g g g g g g s0 g g g g g g g s1 g g g g g g g g g g g g s2 g g g s3
.constants --------10010101110000100100100000
.garbage 11111111-1111111-111111111111-111-
.begin
t2 x6 x8
t2 x7 x8
t2 x0 x8
t1 x8
t2 x5 x8
t1 x8
t2 x1 x8
t1 x8
t2 x4 x8
t1 x8
t2 x2 x8
t1 x8
t2 x3 x8
t1 x8
t3 x6 x7 x9
t2 x6 x10
t3 x6 x7 x10
t2 x7 x10
t2 x0 x11
t2 x10 x11
t3 x0 x9 x11
t3 x0 x10 x11
t2 x9 x12
t3 x0 x10 x12
t3 x0 x9 x12
t2 x5 x13
t2 x12 x13
t3 x5 x11 x13
t3 x5 x12 x13
t2 x11 x14
t3 x5 x12 x14
t3 x5 x11 x14
t2 x1 x15
t2 x14 x15
t3 x1 x13 x15
t3 x1 x14 x15
t2 x13 x14
t3 x1 x14 x13
t2 x4 x16
t2 x13 x16
t3 x4 x15 x16
t3 x4 x13 x16
t2 x15 x13
t3 x4 x13 x15
t2 x2 x17
t2 x15 x17
t3 x2 x16 x17
t3 x2 x15 x17
t2 x16 x15
t3 x2 x15 x16
t1 x16
t3 x3 x16 x17
t3 x3 x17 x16
t3 x0 x9 x18
t3 x5 x18 x19
t2 x0 x20
t3 x0 x10 x20
t2 x10 x20
t2 x5 x21
t3 x5 x20 x21
t2 x20 x21
t2 x1 x22
t2 x21 x22
t3 x1 x19 x22
t3 x1 x21 x22
t2 x12 x23
t3 x5 x20 x23
t3 x5 x12 x23
t2 x23 x24
t3 x1 x21 x24
t3 x1 x23 x24
t2 x4 x25
t2 x24 x25
t3 x4 x22 x25
t3 x4 x24 x25
t2 x18 x12
t3 x5 x12 x18
t2 x18 x26
t3 x1 x23 x26
t3 x1 x18 x26
t2 x26 x27
t3 x4 x24 x27
t3 x4 x26 x27
t2 x2 x28
t2 x27 x28
t3 x2 x25 x28
t3 x2 x27 x28
t2 x19 x29
t3 x1 x18 x29
t3 x1 x19 x29
t2 x29 x26
t3 x4 x26 x29
t2 x29 x27
t3 x2 x27 x29
t1 x29
t3 x3 x29 x28
t3 x3 x28 x29
t3 x1 x19 x30
t3 x4 x30 x31
t3 x2 x31 x32
t3 x3 x32 x33
t1 x8
t1 x16
t1 x29
.end