Help for Computer-Aided Design (CAD) tools on Lyle Engineering Computers

The Lyle servers have various CAD tools that we use in course assignments and research projects. This page provides links to information on tools used by our students for electronic design automation.

Lyle Unix Account

In order to run the tools on the Lyle servers, you will need to set up a Lyle Unix account. Note that it may take up to 48 hours for a new account to be activated, so plan accordingly. Information on how to set up a new account can be found at http://lyle.smu.edu/support/contents/index.php/accounts. If this is your first time with Unix (or need a review), please visit this page.

X-Windows Emulators

After you have set up your account, you will also need to set up X-Windows emulation to run the CAD tools. The type of emulator to use will depend on your PC platform (Windows or Mac).
  1. For Windows machines, use Xming. Click here for information on installing and using Xming (PDF).
  2. For Macs, use the program "X11" (Applications/Utilities/X11.app). If this program is not currently installed on your Mac, it is available on the OS X installation DVD that came with your computer -- install this program. To enable forwarding, run the X11.app before starting the Terminal.app. You may close the xterm window that pops up and use Terminal.app, or you may use this X11 terminal instead. Once X11 is running, when you log into remote UNIX servers (using the -Y option to ssh above), you should be able to display remote graphics. For more information, follow the link http://faculty.smu.edu/reynolds/unixtut/osx.html.

Verilog - Cadence SimVision

Verilog is a hardware description language (HDL) for developing and modeling circuits. The Cadence SimVision tool will help you simulate circuits that have been developed in Verilog. Click here for more information.

RTL Compiler - Synopsys Design Compiler

After you have simulated and verified that your Verilog code is working properly, you can compile the Verilog modules to produce a circuit that is optimized for various criteria (area, timing, power). The Synopsys Design Compiler (SDC) is available on the Lyle machines. Set up X-Windows access as you did for the Cadence Verilog tool to run SDC. Then, click here for tutorial information..

Place & Route - Cadence Encounter

A synthesized Verilog file (produced by an RTL compiler) can be placed and routed. Placement arranges the standard cells of the design into rows on a chip, while routing determines how to wire the interconnections (nets) of the design. The Cadence Encounter Place & Route tool is available on the Lyle machines. Set up X-Windows access as you did for the SDC to run Encounter. Then, click here for tutorial information..
T. Manikas Last update 2014 Oct 27