Publications

Journal Articles

• D.L. MacFarlane and M.A. Thornton, “Higher-radix Quantum Photonic Informatics in Quantum Photonic Circuits,” Journal of Multiple-Valued Logic and Soft Computing (to appear).
• C. Hong, W. Chen, X. Wen, T.W. Manikas, P. Gui, and M.A. Thornton, “Controller Area Network (CAN) Bus Transceiver with Authentication Support and Enhanced Rail Converters,” Chips, 2024.
• M. A. Taylor, A. Sinha, E. C. Larson and M. A. Thornton, “General Process Detection Through Side Channel Characterization,” Journal of Cyber Security Technology, 2024.
• C. A. Harper, M. A. Thornton, and E. C. Larson, “Automatic Modulation Classification with Deep Neural Networks,” Electronics, 2023.
• H. Shahoei, I. G. Achu, E. J. Stewart, U. Tariq, W. V. Oxford, M. A. Thornton, and D. L. MacFarlane, “Silicon Photonics 2×2 Trench Coupler Design and Foundry Fabrication,” Applied Optics, 2022.
• H. Tian, X. Jiang, F. Trozzi, S. Xiao, E. C. Larson, and P. Tao, “Explore Protein Conformational Space With Variational Autoencoder,” Journal on Frontiers in Molecular Biosciences, section Biological Modeling and Simulation 2021.
• Y. Wang, J. Dai, T. Morgan, M. Elsaid, A. Garbens, X. Qu, R. Steinberg, J. Gahan, and E. C. Larson, “Evaluating Robotic-Assisted Surgery Training Videos with Multi-task Convolutional Neural Networks,” Journal of Robotic Surgery (JORS), 2021.
• M. Makos, N. Verma, E. C. Larson, and E. Kraka, “Generative Adversarial Networks for Transition State Geometry Prediction,” The Journal of Chemical Physics, 2021.
• R. Srinivas, N. Verma, E. Kraka, and E. C. Larson, “Deep Learning-Based Ligand Design Using Shared Latent Implicit Fingerprints from Collaborative Filtering,” Journal of Chemical Information and Modeling, 2021.
• N. Verma, X. Qu, F. Trozzi, M. Elsaied, N. Karki, P. Tao, B. Zoltowski, E. C. Larson, and E. Kraka, “SSnet: A Deep Learning Approach for Protein-Ligand Interaction Prediction,” International Journal of Molecular Sciences, 2021.
• J. Wilson, S. Nair, S. Scielzo, and E. C. Larson, “Objective Measures of Cognitive Load Using Deep Multi-Modal Learning: A Use-Case in Aviation,” Proceedings of the ACM on Interactive, Mobile, Wearable and Ubiquitous Technologies, 2021.
• S. Alhelaly, J. Dworak, K. Nepal, T. Manikas, P. Gui and A. L. Crouch, “3D Ring Oscillator Based Test Structures to Detect a Trojan Die in a 3D Die Stack in the Presence of Process Variations,” in IEEE Transactions on Emerging Topics in Computing, 2021.
• X. Ding and E. C. Larson, “Incorporating Uncertainties in Student Response Modeling by Loss Function Regularization,” Journal of Neurocomputing, 2020.
• J. Wilson, S. Nair, S. Scielzo, and E. C. Larson, “Automatic Gaze Classification for Aviators: Using Multi-task Convolutional Networks as a Proxy for Flight Instructor Observation,” International Journal of Aviation, Aeronautics, and Aerospace, 2020.
• X. Ding, Z. Raziei, E. C. Larson, E. Olinick, P. Krueger, and M. Hahsler, “Swapped Face Detection using Deep Learning and Subjective Assessment,” EURASIP Journal on Information Security, 2020.
• X. Wang, T. Liu, S. Guo, M. A. Thornton, and P. Gui, “A 2.56 Gb/s Serial Wireline Transceiver that Supports an Auxiliary Channel in 65-nm CMOS,” IEEE Transactions on VLSI, 2019.
• Y. Sun, F. Zhang, H. Jiang, K. Nepal, J. Dworak, T. W. Manikas, and R. I. Bahar, “Repurposing FPGAs for Tester Design to Enhance Field-Testing in a 3D Stack,” Journal of Electronic Testing: Theory and Applications (JETTA), 2019.
• K. N. Smith and M. A. Thornton, “Higher Dimension Quantum Entanglement Generators,” ACM Journal on Emerging Technologies in Computing Systems, 2019.
• J. M. Medellin and M. A. Thornton, “Consideration of Quality Attribute Tradeoffs of the Blockchain Pattern in the Software Development Process,” Annals of Emerging Technologies in Computing, 2019.
• T. Giallanza, T. Siems, E. Sharp, E. Gabrielsen, I. Johnson, M. A. Thornton, and E. C. Larson, “Keyboard Snooping from Mobile Phone Arrays with Mixed Convolutional and Recurrent Neural Networks,” Proc. of the ACM on Interactive, Mobile, Wearable and Ubiquitous Technologies, 2019.
• K. N. Smith, T. P. LaFave Jr., D. L. MacFarlane, and M. A. Thornton, “Higher-Radix Chrestenson Gates for Photonic Quantum Computation,” Journal of Applied Logics, 2018.
• X. Ding, D. Nassehi, and E. C. Larson, “Measuring Oxygen Saturation using Convolutional Neural Networks on Smartphones,” IEEE Journal of Biomedical and Health Informatics, 2018.
• C. Wang, X. Ding, and E. C. Larson. “PupilNet, Measuring Task Evoked Pupillary Response using Commodity RGB Tablet Cameras: Comparison to Mobile, Infrared Gaze Trackers for Inferring Cognitive Load,” 2017.
• S. D. Gupta and M. A. Thornton, “A Fixed-Point Squaring Algorithm Using an Implicit Radix Number System,” IEEE Journal on Emerging and Selected Topics in Circuits and Systems, 2016.
• P. Niemann, R. Wille, D. M. Miller, M. A. Thornton, and R. Drechsler, “QMDDs: Efficient Quantum Function Representation and Manipulation,” IEEE Transactions on Computer-Aided Design, 2016.
• M. A. Thornton, “Simulation and Implication Using a Transfer Function Model for Switching Logic,” IEEE Transactions on Computers, 2015.
• K. Nepal, S. Alhelaly, J. Dworak, R. I. Bahar, T. W. Manikas, and P. Gui, “Repairing a 3D Die-Stack Using Available Programmable Logic,” IEEE Trans. Computer-Aided Design of Integrated Circuits, 2015.
• D. Y. Feinstein and M. A. Thornton, “Quantum Multiple-Valued Decision Diagrams Containing Skipped Variables,” Journal of Multiple-Valued Logic and Soft Computing, 2015.
• T. W. Manikas, M. A. Thornton, and D. Y. Feinstein, “Modeling System Threat Probabilities Using Mixed-Radix Multiple-Valued Logic Decision Diagrams,” Journal of Multiple-Valued Logic and Soft Computing, 2015 (Invited Paper).
• S. Nagayama, T. Sasao, J. Butler, M. Thornton, and T. W. Manikas, “On Optimizations of Edge-Valued MDDs for Fast Analysis of Multi-State Systems,” IEICE Transactions on Information and Systems, 2014.
• R. P. Menon and M. A. Thornton, “Clock Distribution Area Reduction Using a Multiple-Valued Clocking Approach,” Journal of Multiple-Valued Logic and Soft Computing, 2014.
• P. Laplante, B. Kalinowski, and M. A. Thornton, “A Principles and Practices Exam Specification to Support Software Engineering Licensure in the USA,” Software Quality Professional, 2012.
• M. A. Thornton, “Professional Licensure for Software Engineers: An Update,” IEEE Computing in Science and Engineering, IEEE Computer Society Press and American Institute of Physics, 2012.
• D. Y. Feinstein and M. A. Thornton, “Reversible Logic Synthesis Based on Decision Diagram Variable Ordering,” Journal of Multiple-Valued Logic and Soft Computing, 2012.
• D. Easton and M. A. Thornton, “Business Process Development Through the Use of a Modified Axiomatic Design Methodology,” Journal of International Business Management & Research, 2011.
• T. W. Manikas, L. L. Spenner, P. D. Krier, M. A. Thornton, S. Nair, and S. A. Szygenda, “An Axiomatic Analysis Approach for Large-Scale Disaster-Tolerant Systems Modeling,” Journal of Systematics, Cybernetics and Informatics, 2011.
• S. Barrett and M. A. Thornton, “To PE or not to PE: The Sequel,” IEEE Computing in Science and Engineering, IEEE Computer Society Press and American Institute of Physics, 2010.
• D. Y. Feinstein, M. A. Thornton, and D.M. Miller, “Minimization of Quantum Multiple-Valued Decision Diagrams Using Data Structure Metrics,” Journal of Multiple-Valued Logic and Soft Computing, 2009.
• W. Chen, M. A. Thornton, and P. Gui, “A Redundant Signed Binary Addition Based Digital-to-Frequency Converter,” IET Electronics Letters, 2009.
• A. Fit-Florea, L. Li, M. A. Thornton, and D. W. Matula, “A Discrete Logarithm Number System for Integer Arithmetic Modulo 2k: Algorithms and Lookup Structures,” IEEE Transactions on Computers, 2009.
• D. Easton, M. A. Thornton, V.S.S. Nair, and S. A. Szygenda, “A Methodology for Disaster Tolerance Utilizing the Concepts of Axiomatic Design,” IIIS Journal of Systemics, Cybernetics and Informatics, 2008.
• C. M. Lawler, M. A. Harper, S. A. Szygenda, and M. A. Thornton, “Components of Disaster Tolerant Computing: Analysis of Disaster Recovery, IT Application Downtime & Executive Visibility,” International Journal of Business Information Systems, 2008.
• D. M. Miller, D. Y. Feinstein, and M. A. Thornton, “QMDD Minimization using Sifting for Variable Reordering,” Journal of Multiple-Valued Logic and Soft Computing, 2007.
• L. Li, M. A. Thornton, and S. Szygenda, “Integrated Design Validation: Combining Simulation and Formal Verification in Integrated Circuit Design,” IIIS Journal of Systemics, Cybernetics and Informatics, 2006.
• R. B. Reese, M. A. Thornton, and C. Traver, “A Coarse-Grain Phased Logic CPU,” IEEE Transactions on Computers, 2005.
• R. B. Reese, M. A. Thornton, C. Traver, and D. Hemmendinger, “Early Evaluation for Performance Enhancement in Phased Logic,” IEEE Transactions on Computer Aided Design, 2005.
• A. Fit-Florea, D.W. Matula, and M. A. Thornton “Additive Bit-serial Algorithm for the Discrete Logarithm Modulo 2k,” IET Electronics Letters, 2005.
• A. Fit-Florea, D.W. Matula, and M. A. Thornton “Addition-based Exponentiation Modulo 2k,” IET Electronics Letters, 2005.
• M. A. Thornton and D. M. Miller, “Computation of Discrete Function Chrestenson Spectrum Using Cayley Color Graphs,” Journal of Multiple-Valued Logic and Soft Computing, 2004.
• M. A. Thornton, “Mixed-radix MVL Function Spectral and Decision Diagram Representation,” Automation and Remote Control, 2004 (Invited paper, in English and Russian).
• R. B. Reese, M. A. Thornton, and C. Traver, “A Two-phase Micropipeline Control Wrapper with Early Evaluation,” IET Electronics Letters, 2004.
• R. B. Reese, M. A. Thornton, and C. Traver, “A Fast Two-phase Micropipeline Control Wrapper for Standard Cell Implementation,” IET Electronics Letters, 2004.
• M. A. Thornton, “Performance Evaluation of a Parallel Decoupled Data Driven Multiprocessor,” Parallel Processing Letters, 2003.
• M. A. Thornton, “A Signed Binary Addition Circuit Based on an Alternative Class of Addition Tables,” Computers & Electrical Engineering, 2003.
• R. Drechsler, M. Kerttu, P. Lindgren, and M. A. Thornton, “Low Power Optimization Techniques for BDD Mapped Circuits Using Temporal Correlation,” Canadian Journal of Electrical and Computer Engineering, 2002 (Invited Paper).
• M. A. Thornton, R. Drechsler, and W. Günther, “Logic Circuit Equivalence Checking Using Haar Spectral Coefficients and Partial BDDs,” VLSI Design, 2002.
• A. Žužek, R. Drechsler, and M. A. Thornton, “Boolean Function Representation and Spectral Characterization Using AND/OR Graphs,” Integration, The VLSI Journal, 2000.
• M. A. Thornton and V. S. S. Nair, “Behavioral Synthesis of Combinational Logic Using Spectral Based Heuristics,” ACM Transactions on Design Automation of Electronic Systems, 1999.
• M. A. Thornton and D. L. Andrews, “Resource Estimation for Parallel Architectures with Distributed Processor/Memory Nodes,” Journal of Computing and Information Technology, 1998.
• M. A. Thornton, “Signed Binary Addition Circuitry with Inherent Even Parity Outputs,” IEEE Transactions on Computers, 1997.
• M. A. Thornton and V. S. S. Nair, “BDD Based Spectral Approach for Reed-Muller Circuit Realisation,” IET Proceedings-Computers and Digital Techniques, 1996.
• M. A. Thornton and V. S. S. Nair, “Efficient Calculation of Spectral Coefficients and their Application,” IEEE Transactions on Computer Aided Design, 1995.
• M. A. Thornton and V. S. S. Nair, “Efficient Spectral Coefficient Calculation Using Circuit Output Probabilities,” Digital Signal Processing: A Review Journal, 1994.

Conferences

• W. Chen, C. Hong, X. Wen, P. Gui, and M. A. Thornton, “Controller Area Network (CAN) Bus Transceiver with Enhanced Rail Converter,” IEEE Midwest Symposium on Circuits and Systems (MWSCAS), 2024.
  
• S. Gibbs, V. Tanner, E. Larson, S. Scielzo, A. Abraham, “Towards a Real-Time Model of Trust in Human-Machine Team Paradigms,” NTSA Interservice/Industry Training, Simulation, and Education Conference (I/ITSEC), 2024.
• J. M. Henderson, E. R. Henderson, C. A. Harper, H. Shahoei, W. V. Oxford, E. C. Larson, D. L. MacFarlane, and M. A. Thornton, “A Photonic Physically Unclonable Function’s Resilience to Multiple-Valued Machine Learning Attacks,” IEEE Symposium on Multiple-Valued Logic (ISMVL), 2024.
• E. R. Henderson, J. M. Henderson, W. V. Oxford, and M. A. Thornton, “Automated Quantum Circuit Generation for Computing Inverse Hash Functions,” SPIE Proceedings 13208, DCS24 SPIE Quantum Information Science, Sensing, and Computation XVI, 2024.
• D. L. MacFarlane, A. Helmy, H. Shahoei, T. LaFave, M. A. Thornton, E. Stewart, and W. V. Oxford, “Towards a Photonic Integrated Circuit Realization of Polarization-Encoded Qubits,” SPIE Proceedings Volume 13208, DCS24 SPIE Quantum Information Science, Sensing, and Computation XVI, 2024.
• E. R. Henderson, J. M. Henderson, H. Shahoei, W. V. Oxford, E. C. Larson, D. L. MacFarlane, and M. A. Thornton, “Designing a Photonic Physically Unclonable Function having Resilience to Machine Learning Attacks,” SPIE Proceedings Volume 13208, DCS24 SPIE Quantum Information Science, Sensing, and Computation XVI, 2024.
• C. A. Harper, M. A. Thornton, and E. C. Larson, “Learnable Statistical Moments Pooling for Automatic Modulation Classification,” IEEE International Conference on Acoustics, Speech and Signal Processing (ICASSP), 2024.
• M. Lee, C. A. Harper, W. Flinchbaugh, E. C. Larson, and M. A. Thornton, “Impacts of Synthetically Generated Data on Trackformer-based Multi-object Tracking,” IEEE Applied Imagery Pattern Recognition Workshop (AIPR), 2023.
• J. Sylvester, M. Lee, D. C. Ellis, M. A. Thornton, and E. C. Larson, “Using Time Series Clustering to Inform Multimodal CNN Architectures,” IEEE Applied Imagery Pattern Recognition Workshop (AIPR), 2023.
• M. A. Thornton, W. V. Oxford, J. Gable, J. Sylvester, M. Lee, E. C. Larson, and M. A. Thornton, “Assessing Random Bit Generator Quality with Granger Causality Extensions,” International Cryptographic Modules Conference (ICMC), 2023.
• D. L. MacFarlane, H. Shahoei, I. G. Achu, E. Stewart, W. V. Oxford, and M. A. Thornton, “Multiple-Valued Logic Physically Unclonable Function in Photonic Integrated Circuits,” IEEE Symposium on Multiple-Valued Logic (ISMVL), 2023.
• S. Gibbs, M. A. Thornton, and D. L. Young, “City Scale Autonomy Learning,” SPIE 12525, Geospatial Informatics XIII, 2023.
• A. Sinha, E. R. Henderson, J. M. Henderson, E. C. Larson, and M. A. Thornton, “A Programmable True Random Number Generator using Commercial Quantum Computers,” SPIE 12517, Quantum Information Science, Sensing, and Computation XV, 2023.
• J. M. Henderson, E. R. Henderson, A. Sinha, M. A. Thornton, and D. M. Miller, “Automated Quantum Oracle Synthesis with a Minimal Number of Qubits,” SPIE 12517, Quantum Information Science, Sensing, and Computation XV, 2023.
• S. Gibbs, M. A. Thornton, and D. L. Young, “Adding RF Situational Awareness to Robotic Simulation Systems,” SPIE 12540, Autonomous Systems: Sensors, Processing and Security for Ground, Air, Sea and Space Vehicles and Infrastructure, 2023.
• C. Peters and M. A. Thornton, “Cooperative UAS Geolocation of Emitters with Multi-Sensor-bounded Timing and Localization Error,” IEEE Aerospace Conference (AERO), 2023.
• Z. Wolf, E. C. Larson, and M. A. Thornton, “Data Leakage in Isolated Virtualized Enterprise Computing Systems,” International Conference on Information Systems Security and Privacy (ICISSP), 2023.
• A. Sinha, E. R. Henderson, J. M. Henderson, and M. A. Thornton, “Automated Quantum Memory Compilation with Improved Dynamic Range,” International Conference for High Performance Computing, Networking, Storage, and Analysis (SC22), International Workshop on Quantum Computing software (QSC22), 2022.
• G. Sammit, Z. Wu, Y. Wang, Z. Wu, A. Kamata, J. Nese, and E. C. Larson, “Automated Prosody Classification for Oral Reading Fluency with Quadratic Kappa Loss and Attentive X-vectors,” International Conference on Acoustics, Speech, and Signal Processing (ICASSP 2022), 2022.
• N. Crothers, Y. Sinha, S. Scielzo, and E. C. Larson, “Real-Time Situation Awareness Assessment for Pilots via Machine Learning: Constructing an Automated Classification System,” Modeling & Simulation (MODSIM) World, 2022.
• D. L. Young, M. Bigham, M. Bradbury, E. C. Larson, and M. A. Thornton, “SMU-DDI Cyber Autonomy Range,” IEEE Applied Imagery Pattern Recognition Workshop (AIPR), 2022.
• R. Oshana, M. Caraman, N. Srirama, and M. A. Thornton, “An Embedded Malware Detection System using a Support Vector Machine,” International Conference on Embedded Systems, Cyber-physical Systems and Applications (ESCS) in the World Congress in Computer Science, Computer Engineering and Applied Computing (CSCE), proceedings published in Springer Nature-Transactions on Computational Science and Computational Intelligence, 2022.
• R. Oshana, M. Caraman, and M. A. Thornton, “A Side Channel Attack Detection System using Processor Core Events and a Support Vector Machine,” IEEE Mediterranean Conference on Embedded Computing (MECO), 2022.
• X. Wen, T. Fu, J. Liu, R. Hua, M. A. Thornton, and P. Gui. “Controller Area Network (CAN) Bus Transceiver with Authentication Support,” IEEE International Symposium on Circuits and Systems (ISCAS), 2022.
• A. Sinha and M. A. Thornton, “Quantum Multiple Valued Kernel Circuits,” IEEE International Symposium on Multiple-Valued Logic (ISMVL), 2022.
• M. A. Taylor, E. C. Larson, and M. A. Thornton, “General Process Detection Through Physical Side Channel Characterization,” IEEE Systems Conference (SYSCON), 2022.
• M. Lee, J. Sylvester, S. Aggarwal, A. Sinha, M. Taylor, N. Srirama, E.C. Larson, and M. A. Thornton, “Side Channel Identification using Granger Time Series Clustering with Applications to Control Systems,” International Conference on Information Systems Security and Privacy (ICISSP), 2022.
• C. A. Harper, A. Sinha, E. C. Larson, and M. A. Thornton, “SNR-Boosted Automatic Modulation Classification“, IEEE Asilomar Conference on Signals, Systems, and Computers (ASILOMAR), 2021.
• A. Sinha, M. A. Taylor, N. Srirama, T. W. Manikas, E. C. Larson, and M. A. Thornton, “Industrial Control System Anomaly Detection using Convolutional Neural Network Consensus,” IEEE Conference on Control Technology and Applications (CCTA), 2021.
• M. A. Taylor, E. C. Larson, and M. A. Thornton, “Rapid Ransomware Detection Through Side Channel Exploitation,” IEEE Conference on Cyber Security and Resilience (CSR), 2021.
• R. Oshana, E. C. Larson, M. A. Thornton, and X. Roumegue, “Real-Time Edge Processing Detection of Malicious Attacks using Machine Learning and Processor Core Events,” IEEE Systems Conference (SYSCON), 2021.
• Y. Sun, H. Jiang, L. Ramakrishnan, J. Dworak, K. Nepal, T. Manikas, and R. I. Bahar, “Low Power Shift and Capture through ATPG-Configured Embedded Enable Capture Bits,” 2021 IEEE International Test Conference, 2021.
• E. Tsang, P. Foster, E. Adams, L. Ketterlin-Geller, E.C. Larson, and C. Clark. “A Standard Decomposition Process to Inform the Development of Game-Based Learning Environments Focused on Computational Thinking,” International Conference of Computational Thinking and STEM Education (CTE-STEM), 2021.
• L. Wood and E. C. Larson, “Parametric Spectral Filters for Fast Converging, Scalable Convolutional Neural Networks,” 2021 IEEE International Conference on Acoustics, Speech and Signal Processing (ICASSP), 2021.
• K. N. Smith, D. L. MacFarlane, and M. A. Thornton, “A Quantum Photonic TRNG based on Higher-radix Logic,” IEEE International Symposium on Multiple-Valued Logic (ISMVL), 2020.
• K. N. Smith, M. A. Thornton, and D. M. Miller, “Fast Minimization of Polynomial Decomposition using Fixed-polarity Pascal Transforms,” IEEE International Symposium on Multiple-Valued Logic (ISMVL), 2020.
• K. N. Smith, D. L. MacFarlane, and M. A. Thornton, “A Quantum Photonic TRNG based on Higher-radix Logic,” IEEE International Symposium on Multiple-Valued Logic (ISMVL), 2020.
• M. A. Thornton, “Introduction to Quantum Computation Reliability,” IEEE International Test Conference (ITC), 2020.
• C. A. Harper, L. Lyons, M. A. Thornton, and E. C. Larson, “Enhanced Automatic Modulation Classification using Deep Convolutional Latent Space Pooling,” IEEE Asilomar Conference on Signals, Systems, and Computers (ASILOMAR), 2020.
• S. Scielzo, J. Wilson, and E. C. Larson, “Towards the Development of an Automated, Real-Time, Objective Measure of Situation Awareness for Pilots,” Interservice/Industry Training, Simulation & Education Conference (I/ITSEC), 2020, (Overall Best Paper Winner, Platinum Paper, among all papers at conference).
  X. Ding and E. C. Larson, “Automatic RNN Cell Design for Knowledge Tracing using Reinforcement Learning,” 7th ACM Conference on Learning @ Scale, 2020.
• S. Douglas and E. C. Larson, “Relationships Between Deep Learning and Linear Adaptive Systems,” IEEE International Conference on Acoustics, Speech and Signal Processing (ICASSP), 2019 (Invited Paper).
• K. N. Smith and M. A. Thornton, “Entangled State Preparation for Non-Binary Quantum Computing,” IEEE International Conference on Rebooting Computing (ICRC), 2019.
• K. N. Smith and M. A. Thornton, “Fixed Polarity Pascal Transforms with Computer Algebra Applications,” IEEE Pacific Rim Conference on Communications, Computers, and Signal Processing (PACRIM), 2019.
• K. N. Smith and M. A. Thornton, “Quantum Logic Synthesis with Formal Verification,” IEEE Midwest Symposium on Circuits and Systems (MWSCAS), 2019.
• J. Medellin and M. A. Thornton, “A Discussion on Blockchain Software Quality Attribute Design and Tradeoffs,” International Conference on Emerging Topics in Computing (iCETiC), 2019 (Best Paper Award).
• K. N. Smith and M. A. Thornton, “A Quantum Computational Compiler and Design Tool for Technology-specific Targets,” IEEE International Symposium on Computer Architecture (ISCA), 2019.
• K. N. Smith, M. A. Thornton, M. Soeken, B. Schmitt, and G. De Micheli, “Using ZDDs in the Mapping of Quantum Circuits,” Quantum Physics and Logic Conference (QPL), 2019.
• K. N. Smith and M. A. Thornton, “Entanglement in Higher-Radix Quantum Systems,” IEEE International Symposium on Multiple-Valued Logic (ISMVL), 2019.
•  T. Giallanza, E. Gabrielsen, M. A. Taylor, E. C. Larson, and M. A. Thornton, “Task Value Calculus: Multi-objective Tradeoff Analysis using Multiple-valued Decision Diagrams,” IEEE International Symposium on Multiple-Valued Logic (ISMVL), 2019.
• M. A. Thornton and D. L. MacFarlane, “Quantum Photonic TRNG with Dual Extractor,” International Conference on Networked Systems/Workshop on Quantum Technology and Optimization Problems (NetSys/QTOP), Springer-Verlag LNCS 2019.
• J. Medellin and M. A. Thornton, “Performance Characteristics of Two Blockchain Consensus Algorithms in a VMware Hypervisor,” in proc. International Conference on Grid, Cloud, and Cluster Computing (GCC), 2018.
• J. Medellin and M. A. Thornton, “Simulating Resource Consumption in Three Blockchain Consensus Algorithms,” in proc. International Conference on Modeling, Simulation and Visualization Methods (MSV), 2018.
• X. Wang, T. Liu, S. Guo, M. A. Thornton, and P. Gui, “A 2.56 Gbps Asynchronous Serial Transceiver with Embedded 80 Mbps Secondary Data Transmission Capability in 65nm CMOS,” IEEE Radio Frequency Integrated Circuits Symposium (RFIC), 2018.
• M. A. Thornton and M. A. Thornton, “Multiple-Valued Random Digit Extraction,” IEEE International Symposium on Multiple-Valued Logic (ISMVL), 2018.
• K. N. Smith, T. P. LaFave Jr., D. MacFarlane, and M. A. Thornton, “A Radix-4 Chrestenson Gate for Optical Quantum Computation,” IEEE International Symposium on Multiple-Valued Logic (ISMVL), 2018.
• M. A. Taylor, K. N. Smith, and M. A. Thornton, “Sensor-Based Ransomware Detection,” Future Technologies Conference (FTC), 2017.
• D. K. Houngninou and M. A. Thornton, “Simulation of Switching Circuits using Transfer Functions,” IEEE Midwest Symposium on Circuits and Systems (MWSCAS), 2017.
• K. N. Smith, M. A. Taylor, A. A. Carroll, T. W. Manikas, and M. A. Thornton, “Automated Markov-chain Based Analysis for Large State Spaces,” IEEE International Systems Conference (SYSCON), 2017.
• A. R. Alharbi and M. A. Thornton, “Demographic Group Prediction Based on Smart Device User Recognition Gestures,” IEEE International Conference on Machine Learning and Applications (ICMLA), 2016.
• D. K. Houngninou and M. A. Thornton, “Implementation of Switching Circuit Models as Transfer Functions,” IEEE International Symposium on Circuits and Systems (ISCAS), 2016.
• P. C. Davis, M. A. Thornton, and T. W. Manikas, “Reliability Block Diagram Extensions for Non-Parametric Probabilistic Analysis,” IEEE International Systems Conference (SYSCON), 2016.
• A. R. Alharbi and M. A. Thornton, “Demographic Group Classification of Smart Device Users,” IEEE International Conference on Machine Learning and Applications (ICMLA), 2015.
• T. W. Manikas, M. A. Thornton, S. Nagayama, “An Improved Methodology for System Threat Analysis using Multiple-Valued Logic and Conditional Probabilities,” Society for Design and Process Science (SDPS), 2015.
• K. N. Smith and M. A. Thornton, “A Multiple-Valued Logic Synthesis Tool for Optical Computing Elements,” IEEE Dallas Circuits and Systems Conference (DCAS), 2015.
• S. Nagayama, T. Sasao, J. T. Butler, M. A. Thornton, and T. W. Manikas, “Edge Reduction for EVMDDs to Speed Up Analysis of Multi-State Systems,” IEEE International Symposium on Multiple-Valued Logic (ISMVL), 2015.
• M. A. Thornton, T. W. Manikas, S. A. Szygenda, and S. Nagayam, “System Probability Distribution Modeling Using MDDs,” IEEE International Symposium on Multiple-Valued Logic (ISMVL), 2014.
• S. Nagayama, T. Sasao, J. T. Butler, M. A. Thornton, and T. W. Manikas, “Analysis Methods of Multi-State Systems Partially having Dependent Components using Multiple-Valued Decision Diagrams,” IEEE International Symposium on Multiple-Valued Logic (ISMVL), 2014.
• K. Nepal, X. Shen, J. Dworak, T. W. Manikas, and R. I. Bahar, “Built-in Self-Repair in a 3D Die Stack Using Programmable Logic,” IEEE Symposium Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2013.
• J. Moore, M. A. Thornton, and D. W. Matula, “Low Power Floating-Point Multiplication and Squaring Units with Shared Circuitry,” IEEE Midwest Symposium on Circuits and Systems (MWSCAS), 2013.
• M. A. Thornton, “A Transfer Function Model for Ternary Switching Logic Circuits,” IEEE International Symposium on Multiple-Valued Logic (ISMVL), 2013,
• M. A. Thornton and J. Dworak, “Ternary Logic Network Justification Using Transfer Matrices,” IEEE International Symposium on Multiple-Valued Logic (ISMVL), 2013.
• M. A. Thornton and T. W. Manikas, “Spectral Response of Ternary Logic Netlists,” IEEE International Symposium on Multiple-Valued Logic (ISMVL), 2013.
• D. Y. Feinstein and M. A. Thornton, “Using the Asynchronous Paradigm for Reversible Sequential Circuit Implementation,” IEEE International Symposium on Multiple-Valued Logic (ISMVL), 2012.
• R. P. Menon and M. A. Thornton, “Global Multiple-Valued Clock Approach for High-Performance Multi-Phase Clock Integrated Circuits,” IEEE International Symposium on Multiple-Valued Logic (ISMVL), 2012.
• T. W. Manikas, D. Y. Feinstein, and M. A. Thornton, “Modeling Medical System Threats with Conditional Probabilities Using Multiple-Valued Logic Decision Diagrams,” IEEE International Symposium on Multiple-Valued Logic (ISMVL), 2012.
• R. B. Reese, S. A. Smith, and M. A. Thornton, “Uncle-An RTL Approach to Asynchronous Design,” IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC), 2012.
• S. Pham, J. L. Dworak, and T. W. Manikas, “An Analysis of Differences Between Trojans Inserted at RTL and at Manufacturing with Implications for their Detectability,” IEEE North Atlantic Test Workshop, 2012.
• D. Y. Feinstein and M. A. Thornton, “On the Skipped Variables of Quantum Multiple-Valued Decision Diagrams,” IEEE International Symposium on Multiple-Valued Logic (ISMVL), 2011.
• T. W. Manikas, M. A. Thornton, and D. Y. Feinstein, “Using Multiple-Valued Logic Decision Diagrams to Model System Threat Probabilities,” IEEE International Symposium on Multiple-Valued Logic (ISMVL), 2011.
• D. M. Easton and M. A. Thornton, “A Compliance Framework to Optimize Product Development in a Regulated Industry,” Intellectbase International Consortium Academic Conference, 2011.
• M. A. Thornton, “Spectral Analysis of Digital Logic Circuit Netlists,” International Conference on Computer Aided Systems Theory (EUROCAST), 2011.
• T. W. Manikas, “Modeling of Large-Scale Disaster-Tolerant Systems,” Society for Design and Process Science Conference (SDPS), 2010.
• S. Datla and M. A. Thornton, “Quaternary Voltage-Mode Logic Cells and Fixed-Point Multiplication Circuits,” IEEE International Symposium on Mulitple-Valued Logic (ISMVL), 2010.
• T. W. Manikas, L. L. Spenner, P. D. Krier, M. A. Thornton, S. Nair, and S. A. Szygenda, “An Axiomatic Analysis Approach for Large-Scale Disaster-Tolerant Systems Modeling,” International Multi-Conference on Complexity, Informatics, and Cybernetics (IMIC10), International Conference on Computing, Communications and Control Technologies (CCCT) Int. Institute of Informatics and Systemics (IIIS), 2010 (Best Paper Award).
• P. Ongsakorn, K. Turney, M. A. Thornton, S. Nair, S. Szygenda, and T. W. Manikas, “Cyber Threat Trees for Large System Threat Cataloging and Analysis,” IEEE Systems Conference (SYSCON), 2010.
• L. Spenner, P. Krier, M. A. Thornton, S. Nair, S. Szygenda, and T. W. Manikas, “Large System Decomposition and Simulation Methodology Using Axiomatic Analysis,” IEEE International Systems Conference, (SYSCON), 2010.
• T. W. Manikas and M. A. Thornton, “Axiomatic Analysis and Cyber Threat Tree Models for the Development of Large-Scale Disaster-Tolerant Information Security Systems,” Symposium on Information Systems and Computing Technology Network (ISaCTN), 2010.
• W. Chen, M. A. Thornton, and P. Gui, “A Digital-to-Frequency Converter Using Redundant Signed Binary Addition,” IEEE Midwest Symposium on Circuits and Systems (MWSCAS), 2009.
• S. Datla, M. A. Thornton, and D. W. Matula, “A Low Power High Performance Radix-4 Approximate Squaring Circuit,” IEEE International Conference on Application-specific Systems, Architectures, and Processors (ASAP), 2009.
• D. Feinstein and M. A. Thornton, “On the Guidance of Reversible Logic Synthesis by Dynamic Variable Ordering,” IEEE International Symposium on Multiple-Valued Logic (ISMVL), 2009.
• S. Datla, M. A. Thornton, L. Hendrix, and D. Henderson, “Quaternary Addition Circuits Based on SUSLOC Voltage-Mode Cells and Modeling with System Verilog,” IEEE International Symposium on Multiple-Valued Logic (ISMVL), 2009.
• M. A. Thornton, D. W. Matula, L. Spenner, and D. M. Miller, “Quantum Logic Implementation of Unary Arithmetic Operations,” IEEE International Symposium on Multiple-Valued Logic (ISMVL), 2008.
• D. Y. Feinstein, M. A. Thornton, and D. M. Miller, “Partially Redundant Logic Detection Using Symbolic Equivalence Checking in Reversible and Irreversible Logic Circuits,” Proceedings of the IEEE/ACM Design, Automation and Test in Europe (DATE), 2008.
• L. Li, F. Coyle, and M. A. Thornton, “UML to SystemVerilog Synthesis for Embedded System Models with Support for Assertion Generation,” Proceedings of the ECSI Forum on Design Languages, 2007.
• K. Fazel, J. E. Rice, and M. A. Thornton, “ESOP-based Toffoli Gate Cascade Generation,” Proceedings of the IEEE Pacific Rim Conference on Communications, Computers and Signal Processing, 2007.
• D. Easton, M. A. Thornton, V. S. S. Nair, and J. Stracener, “Axiomatic Design in the Biomedical Device Industry,” Proceedings of the 11th World Multi-Conference on Systemics, Cybernetics and Informatics (WMSCI), 2007.
• D. Easton, M. A. Thornton, and V. S. S. Nair, “Axiomatic Design Process for Disaster Tolerance,” Proceedings of the 11th World Multi-Conference on Systemics, Cybernetics and Informatics (WMSCI), 2007.
• D. M. Miller, D. Y. Feinstein, and M. A. Thornton, “Variable Reordering and Sifting for QMDD,” IEEE International Symposium on Multiple Valued Logic (ISMVL), 2007.
• M. Amoui, D. Grosse, M. A. Thornton, and R. Drechsler, “Evaluation of Toggle Coverage for MVL Circuits Specified in the SystemVerilog HDL,” IEEE International Symposium on Multiple Valued Logic (ISMVL), 2007.
• C. M. Lawler, M. A. Thornton, and S. A. Szygenda, “Techniques for Disaster Tolerant Information Technology Systems,” IEEE Systems Conference, 2007.
• M. A. Harper, M. A. Thornton, and S. A. Szygenda, “Disaster Tolerant Systems Engineering for Critical Infrastructure Protection,” IEEE Systems Conference, 2007.
• L. Li, A. Fit-Florea, M. A. Thornton, and D. W. Matula, “Performance Evaluation of a Novel Table Lookup Method and Architecture for Integer Functions,” IEEE International Conference on Application-specific Systems, Architectures, and Processors (ASAP), 2006.
• D. M. Miller, M. A. Thornton, and D. Goodman, “A Decision Diagram Package for Reversible and Quantum Circuit Simulation,” IEEE Congress on Evolutionary Computation, IEEE World Congress on Computational Intelligence (WCCI), 2006 (Best Paper of Session).
• D. M. Miller and M. A. Thornton, “QMDD: A Decision Diagram Structure for Reversible and Quantum Circuits,” IEEE International Symposium on Multiple-Valued Logic (ISMVL), 2006.
• L. Li, M. A. Thornton, and M. A. Perkowski, “A Quantum CAD Accelerator Based on Grover’s Algorithm for Finding the Minimum Fixed Polarity Reed-Muller Form,” IEEE International Symposium on Multiple-Valued Logic (ISMVL), 2006.
• S. A. Szygenda and M. A. Thornton, “Disaster Tolerant Computing and Communications,” International Conference on Cybernetics and Information Technologies, Systems and Applications (CITSA 2005), and International Conference on Information Systems Analysis and Synthesis (ISAS), 2005 (Invited Paper).
• M. A. Harper, C. Lawler, and M. A. Thornton, “IT Application Downtime, Executive Visibility and Disaster Tolerant Computing,” International Conference on Cybernetics and Information Technologies, Systems and Applications (CITSA 2005), and International Conference on Information Systems Analysis and Synthesis (ISAS), 2005 (Invited Paper).
• M. A. Thornton, “The Karhunen-Loève Transform of Discrete MVL Functions,” IEEE International Symposium on Multiple-Valued Logic (ISMVL), 2005.

Abstracts

• M. A. Thornton, “Embedded Systems Cyber Security at the Physical Layer,” Information Systems and Computing Technology Networks (ISaCTN), (internal-only) Raytheon Technologies Conference, 2021.
• Y. Sun, H. Jiang, L. Ramakrishnan, M. Segal, J. Dworak, T. W. Manikas, K. Nepal, and R. I. Bahar, “Test Architecture for Fine Grained Capture Power Reduction”, 2019 26th IEEE International Conference on Electronics, Circuits and Systems (ICECS), 2019.
• T. W. Manikas and M. A. Thornton, “Model Checking for Security Analysis of Cyber-Physical Systems,” International Conference on Data Intelligence and Security (ICDIS), 2019.
• K. N. Smith and M. A. Thornton, “An Open-Source General Compiler for Quantum Computers,” Free and Open Source Developers European Meeting (FOSDEM), 2019.
• M. A. Thornton, W. V. Oxford, D. L. MacFarlane, and T. P. LaFave, Jr., “Single Qubit Quantum Ring Oscillator and Applications for Storage and True Random Number Generation,” Quantum Simulation & Computation Conference (QSC), 2018.
• W. V. Oxford, J. S. Gable, M. A. Thornton, D. L. MacFarlane, and T. P. LaFave, Jr., “Design and Implementation of a Photonic Quantum Storage Device,” IBM Think Q Conference, 2017.
• M. A. Thornton, D. L. MacFarlane, T. P. LaFave, Jr., and W. V. Oxford, “Single Photon Quantum State Oscillator,” NIST Single Photon Workshop (SPW), 2017.
• Micah A. Thornton, J. Rendon, G. Pham, and M. A. Thornton, “Sample Size Calculations using Techniques from Power Analysis,” ASA Conference on Statistical Practice (CSP), 2016.
• J. Rendon, M. A. Thornton, Micah A. Thornton, and G. Pham, “Use of Hamming Weights Instead of Uniform Distributions to Analyze a Set of Strings for Randomness,” ASA Conference on Statistical Practice (CSP), 2016.
• T. W. Manikas and M. A. Thornton, “Axiomatic Analysis and Cyber Threat Tree Models for the Development of Large-Scale Disaster-Tolerant Information Security Systems,” Raytheon Information Systems and Computing Technology Network Symposium (ISaCTN), 2010.

Books, Book Chapters, and Encyclopedia Articles

• M. A. Thornton, D. K. Houngninou, and D. M. Miller, “On Computing the Reed-Muller Spectrum/Algebraic Normal Form for Cryptography and Switching Theory,” Chapter 1 in Advances in the Boolean Domain, Cambridge Scholars Publishing, Bernd Steinbach (Ed.), 2022.
• M. A. Thornton, D. K. Houngninou, and D. M. Miller, “Extracting the Reed-Muller Spectrum/Algebraic Normal Form from a Circuit Specification,” Chapter 2 in Advances in the Boolean Domain, Cambridge Scholars Publishing, Bernd Steinbach (Ed.), 2022.
• M. A. Thornton, “Keyboard Dynamics“, Article in the Encyclopedia of Cryptography, Security and Privacy, 3rd edition, S. Jajodia, P. Samarati, and M. Yung (Ed.), Springer, 2021.
• M. A. Thornton, “Foreward” in Further Improvements in the Boolean Domain, Cambridge Scholars Publishing, Bernd Steinbach (Ed.), 2018.
• M. A. Thornton, “A Vector Space Method for Boolean Networks,” Chapter 1, Section 1.1, in Problems and New Solutions in the Boolean Domain, Cambridge Scholars Publishing, Bernd Steinbach (Ed.), 2016.
• M. A. Thornton and M. A. Thornton, “Boolean Function Spectra and Circuit Probabilities,” Chapter 4, Section 4.1, in Problems and New Solutions in the Boolean Domain, Cambridge Scholars Publishing,Bernd Steinbach (Ed.), 2016.
• M. A. Thornton, Modeling Digital Switching Circuits with Linear Algebra, Morgan & Claypool Publishers, 2014.
• R. Kotamarti, M. A. Thornton, and M. H. Dunham, “Quantum Computing Approach for Alignment-free Sequence Search and Classification,” Chapter 17 in Multidisciplinary Computational Intelligence Techniques: Applications in Business, Engineering, and Medicine, S. Ali, N. Abbadeni, and M. Batouche (Eds.), IGI-Global Press, 2012.
• M. A. Thornton and P. A. Laplante, Licensing Professional Software Engineers in the United States of America, Article in the Encyclopedia of Software Engineering, Taylor & Francis, 2012.
• M. A. Thornton, “Keystroke Dynamics”, Article in the Encyclopedia of Cryptography, Security and Privacy, 2nd edition, Springer Publishers, H. C. A. van Tilborg and S. Jajodia (Eds.), 2011.
• L. Li and M. A. Thornton, Digital System Verification: A Combined Formal Methods and Simulation Framework, Morgan & Claypool Publishers, 2010.
• D. M. Miller and M. A. Thornton, Multiple-Valued Logic Concepts and Representations, Morgan & Claypool Publishers, 2008.
• R. B. Reese and M. A. Thornton, Introduction to Logic Synthesis Using Verilog HDL, Morgan & Claypool Publishers, 2006.
• M. A. Thornton, R. Drechsler, and D.M. Miller, Spectral Techniques in VLSI CAD, Kluwer Academic Publishers, 2001.

Workshops

• D. K. Houngninou, D. M. Miller, and M. A. Thornton, “ANF Computation of Cryptographic Switching Functions using a Netlist Representation,” Reed-Muller Workshop (RM 2021), Proceedings of the Workshop on Applications of the Reed-Muller Expansion in Circuit Design (RMW), 2021.
• D. Pompa and M. A. Thornton, “Applying a Variational Eigensolver for Hybrid Quantum-Classical Machine Learning,” 18th International Conference on Quantum Physics and Logic, 2021.
• K. N. Smith, J. M. Henderson, and M. A. Thornton, “Rotation Primitives in Quantum Compilation,” International Workshop on Quantum Compilation (IWQC, in conjunction with IEEE/ACM ICCAD), 2019.
• M. A. Thornton and K. N. Smith, “Fixed Polarity Pascal Transforms with Computer Algebra Applications,” Reed-Muller Workshop (RM 2019), Proceedings of the Workshop on Applications of the Reed-Muller Expansion in Circuit Design (RMW), 2019.
• Y. Sun, H. Jiang, L. Ramakrishnan, M. Segal, J. Dworak, K. Nepal, T. W. Manikas, and R. I. Bahar, “Scan Segment Disable for Capture Power Reduction for Low-Power Decompressed Patterns,” 2019 IEEE North Atlantic Test Workshop (NATW), 2019.
• K. N. Smith and M. A. Thornton, “Automated Mapping Methods for the IBM Transmon Devices,” International Workshop on Post-Binary ULSI Systems (ULSI-WS), 2018.
• E. Gabrielsen and M. A. Thornton, “Minimizing Ancilla and Garbage Qubits in Reversible Functions,” Southwest Quantum Information and Technology Annual SQuInT Workshop (SQuInT), 2018.
• K. N. Smith, M. A. Thornton, D. L. MacFarlane, T. P. LaFave, Jr., and W. V. Oxford, “Single Qubit Quantum Ring Structures and Applications,” Southwest Quantum Information and Technology Annual SQuInT Workshop (SQuInT), 2018.
• K. N. Smith and M. A. Thornton, “MUSTANG-Q: A Technology Dependent Quantum Logic Synthesis and Compilation Tool,” Design Automation for Quantum Computers Workshop, IEEE International Conference on Computer Aided Design (ICCAD-QCEDA), 2017.
• M. A. Thornton and D. M. Miller, “On the Computation of Reed-Muller Spectra for Cryptography and Switching Theory Applications,” Proceedings of the Workshop on Applications of the Reed-Muller Expansion in Circuit Design (RMW), 2017.
• F. Zhang, Y. Sun, X. Shen, K. Nepal, J. Dworak, T. W. Manikas, P. Gui, R.I. Bahar, A. Crouch, and J. Potter, “Using Existing Reconfigurable Logic in 3D Die Stacks for Test,” IEEE North Atlantic Test Workshop, 2016 (IEEE Excellence in Design and Test Engineering Award).
• M. A. Thornton, “A Vector Space Model for Boolean Switching Networks,” Proceedings of the International Workshop on Boolean Problems (IWSBP), 2014.
• M. A. Thornton and M. A. Thornton, “On the Relationship of Boolean Function Spectra and Circuit Output Probabilities,” Proceedings of the International Workshop on Boolean Problems (IWSBP), 2014.
• T. W. Manikas, M. A. Thornton, and F. R. Chang, “Mission Planning Analysis Using Decision Diagrams,” Proceedings of the Workshop on Applications of the Reed-Muller Expansion in Circuit Design (RMW), 2013.
• K. Nepal, X. Shen, J. Dworak, T. W. Manikas, and R. I. Bahar, “Harnessing an FPGA for Built-in Self-Repair in a 3D Die Stack,” IEEE North Atlantic Test Workshop, 2013.
• M. A. Thornton and J. Dworak, “Direct Reed-Muller Transform of Digital Logic Netlists,” Proceedings of the Workshop on Applications of the Reed-Muller Expansion in Circuit Design and Representations and Methodology of Future Computing Technology (RMW), 2011.
• J. Rice, K. Fazel, M. A. Thornton, and K. Kent, “Toffoli Gate Cascade Generation Using ESOP Minimization and QMDD-Based Swapping,” Proceedings of the Applications of the Reed-Muller Expansion in Circuit Design and Representations and Methodology of Future Computing Technology (RMW), 2009.
• D. M. Miller and M. A. Thornton, “QMDD and Spectral Transformation of Binary and Multiple-Valued Functions,” 8th International Workshop on Boolean Problems (IWBP), 2008.
• D. Goodman, M. A. Thornton, D. Y. Feinstein, and D. M. Miller, “Quantum Logic Circuit Simulation Based on the QMDD Data Structure,” Proceedings of the Workshop on Applications of the Reed-Muller Expansion in Circuit Design and Representations and Methodology of Future Computing Technology (RMW), 2007.
• D. Y. Feinstein and M. A. Thornton, “ESOP Transformation to Majority Gates for Quantum-dot Cellular Automata Logic Synthesis,” Proceedings of the Workshop on Applications of the Reed-Muller Expansion in Circuit Design and Representations and Methodology of Future Computing Technology (RMW), 2007.
• C. M. Lawler, M. A. Harper, and M. A. Thornton, “Components of Disaster Tolerant Computing,” International Workshop on Information Assurance, in conjunction with the IEEE International Performance Computing and Communications Conference, 2007.